This datasheet describes the IBM04361OULAB 1Mb SRAM, a high-performance CMOS static random access memory with a synchronous flow-through mode of operation.
The device features a 32K x 36 or 64K x 18 organization, registered addresses, write enables, synchronous select, and data inputs. It operates with a single +3.3V power supply and is compatible with LVTTL IO interfaces.
Key Features
Byte write capability, global write enable, and asynchronous output enable.
Boundary scan using a limited set of JTAG 1149.1 functions.
Single differential PECL clock compatible with LVTTL levels.
Package and Pinout
The device is available in a 7 x 17 BGA package with an SRAM JEDEC standard pinout.
Manual:
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