Overview
The ACT 2 family is a second-generation field-programmable gate array (FPGA) with a two-module architecture, consisting of C-modules and S-modules, optimized for combinatorial and sequential designs.
Key Features
Up to 8,000 gate array gates (20,000 PLD equivalent gates), replacing up to 200 TTL packages or 80 20-pin PAL packages.
Features a design library with over 500 macro functions, single-module sequence functions, and wide-input combinatorial functions.
Offers up to 232 programmable logic modules, 998 flip-flops, and 16-bit prescaled counters, loadable counters, and accumulators.
Supports in-circuit diagnostic probe pins, speed analysis up to 50 MHz, and two high-speed, low-skew clock networks.
Implemented in 1.0 micron CMOS technology with nonvolatile, user-programmable logic and fully tested prior to shipment.
Manual:
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