The GALZOVBB/GALZOVBA is a high-performance E?CMOS PLD that combines a high-speed CMOS process with Electrically Erasable (E?) floating gate technology.
Key features include:
- 7.5 ns maximum propagation delay
- 100 MHz maximum clock frequency
- TTL compatible 24 mA output
- Ultra-low power consumption (45 mA typical)
- Active pull-ups on all pins
- Reconfigurable logic and guaranteed cells
- High-speed electrical erasure (< 100 ms)
- 20-year data retention
Applications include DMA control, state machine control, high-speed graphics processing, and standard logic speed upgrade.
Pin Configuration
The device is available in 24-pin plastic DIP and 28-lead PLCC packages.
Output Logic Macrocell (OLMC)
The OLMC can be configured in three global modes: simple, complex, and registered. The device can emulate various PAL architectures with full function/fuse map/parametric compatibility.
Manual:
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Pricing & Distributors: https://www.datasheets360.com/part/detail/gal20v8a-25lj/-8649215802359029340/
