IGLOO Low Power Flash FPGAs with Flash*Freeze Technology

Category: Electronics, Microsemi Corp, Programmable Logic ICS

Overview

The IGLOO series by Microsemi represents a family of low-power flash FPGAs that incorporate Flash*Freeze technology, catering to a broad spectrum of system gate capacities and power-saving features tailored for demanding applications that prioritize energy-efficiency.

Power and Performance Features

These FPGAs boast a wide variety of power and performance specifications, including core voltages ranging from 1.2V to 1.5V, multiple I/O standards support (LVCMOS, PCI, and differential I/O standards), as well as programmable output slew rate and drive strength. They demonstrate superior power efficiency, with a mere 5 pW power consumption in Flash*Freeze mode and low power active operation for FPGA tasks.

Design and In-System Capabilities

With design capacities starting from 15K system gates up to a staggering 1 million, the FPGAs include up to 300 user I/Os, in-system programming (ISP) facilitated by a 128-bit AES, and versatile on-chip memory ranging from SRAM to user nonvolatile memory. The 130-nm technology-based devices provide advanced features like clock conditioning circuits, integrated phase-locked loops, system-configurable phase shift, and in-system programmability.

Technology and Support

Embedded within a 7-layer metal, flash-based CMOS process, these FPGAs are designed for instant-on operations, pin compatibility across the family for streamlined design iterations, and the ability to retain programmed design when power is removed. Additionally, they incorporate advanced encryption standard (AES) protected ISP, except for ARM-enabled variants, reinforcing security and design integrity.

System Integration and ARM Processor Support

IGLOO FPGAs integrate effortlessly within a system offering not only a single-chip solution but also compatibility with ARM processors in certain devices. The M1 IGLOO devices offer the Cortex-M1 soft processor, enhancing the versatility and application scope of the chips.

Variants and Packaging

The datasheet details multiple devices in the IGLOO family ranging from AGL015 to AGL1000, including ARM-enabled options, differentiated by system gate capacity and other key specifications such as macrocells, RAM blocks, and maximum user I/Os. These devices come in an array of package types to suit diverse application needs.

Additional Notes

It is important to note that certain limitations exist such as the AGLO15 not being recommended for new designs, the absence of AES for ARM-enabled devices, and specific package incompatibilities for the MIAGL250 device. For more comprehensive information, there are references to additional documentation and user guides.

All these attributes consolidate the IGLOO series as a go-to solution for developers requiring flexibility, security, and above all, low power consumption for high-performance electronic designs.