igloo-low-power-flash-fpgas-with-flashfreeze-technology-datasheet.pdf

Overview of IGLOO Low Power Flash FPGA Series

The IGLOO series of Flash Field Programmable Gate Arrays (FPGAs), as presented by Microsemi, offers a range of low-power, flash-based FPGAs equipped with Flash*Freeze technology. These devices are designed to deliver high performance with minimal power consumption, suitable for applications requiring power efficiency and a high degree of functionality in a single chip.

Key Features and Technologies

The datasheet lists several features and benefits inherent to the IGLOO series. These devices are available with varying system gates from 15K to 1 million, ensuring scalability for different application requirements. They incorporate Flash*Freeze technology for ultra-low power consumption while preserving FPGA content and support a wide variety of single-ended and differential I/O standards.

The IGLOO series boasts multiple power-saving modes, including the Flash*Freeze mode, which allows for power consumption as low as 5 pW and the support of low voltage single-ended I/O standards such as LVCMOS at various voltage levels and PCI protocols. Furthermore, the datasheet notes support for mixed-voltage operation and high-performance routing hierarchy with up to 300 user I/Os.

The FPGAs come with up to 144 Kbits of true dual-port SRAM and feature in-system programmability (ISP) with advanced encryption for secure deployment. These devices make use of a 130-nm, 7-layer metal flash-based CMOS process and retain programmed design after power-off.

Performance Specifications

These IGLOO devices operate at a core voltage range of 1.2V to 1.5V and can support clock frequency speeds up to 250 MHz for 1.5V systems and 160 MHz for 1.2V systems. Clock conditioning circuits (CCCs) and programmable phase shift, along with external feedback, allow for precise clock management.

ARM Processor Support and Memory Configuration

ARM-enabled IGLOO devices are specified along with the IGLOO series, indicating compatibility with Cortex-M1 soft processors. Embedded memory and SRAM configurability are highlighted, with up to 4,608-Bit RAM blocks in various organizations designed for versatility in memory applications.

Package Options and Migration

Multiple packaging options are provided, which are pin-compatible across the IGLOO family, simplifying board design and migration processes. The document encourages users to refer to the IGLOO FPGA Fabric User Guide for comprehensive design compatibility details.

The datasheet additionally mentions that certain package sizes, such as AGLO1S, are not recommended for new designs, and provides information on package dimensions, reinforcing the focus on flexibility and scalability offered by the IGLOO FPGA series.

References:

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