28S180/28L180 Enhanced Z180 Microprocessor

Category: Electronics, Microprocessors Microcontrollers Peripheral ICS, Zilog

Overview

The 28S180/28L180 Enhanced Z180 Microprocessor is a highly integrated, high-performance processor that builds upon the legacy of the ZiLOG Z80 devices while providing enhancements in speed, power efficiency, and electromagnetic interference (EMI) reduction.

Key Features

Compatibility with ZiLOG Z80S CPU and extended instruction set
Operating at clock speeds of 10, 20, 33 MHz
5V power supply (with 3.3V option at 20 MHz)
Temperature ranges for operation: 0°C to +70°C, and an extended range of -40°C to +85°C
Available in three package styles: 68-Pin PLCC, 64-Pin DIP, 80-Pin QFP
Incorporating two 16-bit counter/timers and two enhanced UARTs supporting up to 512 Kbps
Includes two chain-linked DMA channels and low power-down modes
On-chip features: interrupt controllers, wait-state generators, oscillator/generator
Expanded MMU addressing up to 16 MB and clocked serial I/O port

Power Efficiency and EMI Reduction

Recognizing the importance of energy efficiency in modern electronics, the microprocessor includes several power-saving modes. The STANDBY mode reduces power consumption by halting external oscillators and the internal clock, consuming only 10 mA. The SLEEP mode stops the CPU but allows on-chip I/O operations to continue, leading to even lower power usage. SYSTEM STOP mode minimizes power consumption by stopping both the CPU and on-chip peripherals. Additionally, the microprocessor features an innovative clock-doubler that enables internal clock speeds to reach twice that of the external clock speed, facilitating lower-cost and lower-frequency crystal usage without sacrificing performance.

Enhanced Communication and Control

Enhancements include improved serial communication facilitated by ESCC-like Baud Rate Generators (BRGs) in the Advanced Communication Services Interface (ASCI), complemented by a 4-byte FIFO buffer to minimize overrun errors. The Direct Memory Access (DMA) controllers also support chain-linking for continuous operation between two channels. Overall, these features enable flexible, high-speed communications and efficient data management.

Note: The datasheet denotes that signals with an overline are active low (e.g., BIW for word, and BIW for byte).