X5323, X5325 CPU Supervisor with 32kBit SPI EEPROM Datasheet

Category: Electronics, Intersil Corporation, Other Semiconductors

X5323, X5325: Overview

The X5323 and X5325 devices, which supersede the X25323 and X25325 models respectively, integrate essential functions needed for reliable system operation into a single package. These functions include Power-on Reset Control, Watchdog Timer, Supply Voltage Supervision, and Block Lock Protection for Serial EEPROM Memory. The integration of these features results in reduced system costs, smaller board footprint, and improved reliability.

Key Functions and Features

Power-on Reset Control: The integrated power-on reset circuit ensures that the RESET/RESET signal is maintained in an active state after power is applied, providing time for the system’s power supply and oscillator to stabilize. This prevents the processor from running code prematurely.

Watchdog Timer: The Watchdog Timer serves as an independent monitoring system for microcontrollers. If the microcontroller neglects to restart the timer within a preselected interval, the RESET/RESET signal is triggered. Users can set the interval from three preset options which remains constant even if the power is cycled.

Supply Voltage Supervision: The low Vcc (supply voltage) detection circuitry monitors system voltage levels. If Vcc drops below a set threshold, the circuit resets the system, holding the RESET/RESET signal active until Vcc reaches an acceptable operating level and stabilizes. Five standard reset threshold voltages are provided, with the ability to be customized for specific or high precision applications.

Additional Features

The datasheet lists several distinct features of the X5323 and X5325 devices, which include:

Reset signal validity down to Vcc = 1V.
Determination of the reset cause whether it is due to watchdog or low voltage through a volatile flag bit.
Low power consumption, beneficial for extending battery life, characterized by less than 1µA standby current with watchdog on and less than 400µA active current during read operations.
32kbits of EEPROM with built-in protection against unintended writes and power variations.
Block Lock protection for securing portions of the EEPROM array.
Efficiency in programming enabled by a 32-byte page write mode and typical 5ms write cycle time.
Versatile 2MHz SPI interface with modes (0,0 and 1,1).
Compatibility with 2.7V to 5.5V and 4.5V to 5.5V power supply operations.
Availability in 14 Ld TSSOP, 8 Ld SOIC, and 8 Ld PDIP packages, all of which comply with Pb-free (RoHS) standards.

Block Diagram and Additional Information

A block diagram is present in the datasheet, detailing the internal structure of the devices, including the Watchdog Timer, Protection Logic, Status Register, Command Decode and Control Logic, Reset and Watchdog Timebase, and Vcc Threshold Reset Logic. The X5323 focuses on RESET functionality while the X5325 provides RESET.

It is crucial to note the devices are sensitive to electrostatic discharge; adherence to proper IC Handling Procedures is advised to prevent damage.